idek

src/arch/x86_64/encode.rs

@@ -11,11 +11,11 @@ pub struct Code {
 }
 
 impl Code {
-    pub fn mov(&mut self, dst: impl RegMem, src: impl Into<RegImmMem>) -> ERes {
+    pub fn mov(&mut self, dst: impl RegMem, src: impl Into<RegMemImm>) -> ERes {
         let src = src.into();
         match dst.kind() {
             RegMemKind::Reg(mut dst) => match src {
-                RegImmMem::Reg(src) => {
+                RegMemImm::Reg(src) => {
                     if dst.width() != src.width() {
                         return Err("src and dst are not same width".into());
                     }
@@ -27,7 +27,7 @@ impl Code {
                     self.bytes.push(0x88 | dst.not8());
                     self.modrm(src, dst);
                 }
-                RegImmMem::Imm(src) => {
+                RegMemImm::Imm(src) => {
                     let src_width = src.width_unsigned()?;
                     if src_width > dst.width() {
                         return Err("immediate cannot fit in register".into());
@@ -47,7 +47,7 @@ impl Code {
                         self.imm(src, dst.width());
                     }
                 }
-                RegImmMem::Mem(src) => {
+                RegMemImm::Mem(src) => {
                     if src.width != dst.width() {
                         return Err("register & memory sizes don't match".into());
                     }
@@ -62,7 +62,7 @@ impl Code {
                 }
             },
             RegMemKind::Mem(dst) => match src {
-                RegImmMem::Reg(src) => {
+                RegMemImm::Reg(src) => {
                     if src.width() != dst.width {
                         return Err("register & memory sizes don't match".into());
                     }
@@ -75,7 +75,7 @@ impl Code {
                     self.bytes.push(0x88 | src.not8());
                     self.modrm(src, dst);
                 }
-                RegImmMem::Imm(src) => {
+                RegMemImm::Imm(src) => {
                     let encode_width = dst.width.min(Width::B32);
                     let src_width = if dst.width == Width::B64 {
                         src.width_signed()
@@ -95,15 +95,15 @@ impl Code {
                     self.modrm(0, dst);
                     self.imm(src, encode_width);
                 }
-                RegImmMem::Mem(_) => return Err("cannot move memory to memory".into()),
+                RegMemImm::Mem(_) => return Err("cannot move memory to memory".into()),
             },
         }
         Ok(())
     }
 
-    pub fn push(&mut self, reg: impl Into<RegImmMem>) -> ERes {
+    pub fn push(&mut self, reg: impl Into<RegMemImm>) -> ERes {
         match reg.into() {
-            RegImmMem::Reg(reg) => match reg.width() {
+            RegMemImm::Reg(reg) => match reg.width() {
                 Width::B64 => {
                     if reg.gt8() {
                         self.bytes.push(0x41);
@@ -113,7 +113,7 @@ impl Code {
                 Width::B16 => todo!(),
                 _ => return Err("register must be 64 or 16 bit".into()),
             },
-            RegImmMem::Imm(imm) => match imm.width_unsigned()? {
+            RegMemImm::Imm(imm) => match imm.width_unsigned()? {
                 Width::B8 => {
                     self.bytes.push(0x6a);
                     self.bytes.push(imm.0 as u8);
@@ -124,7 +124,7 @@ impl Code {
                 }
                 Width::B64 => return Err("immediate must be 32 bit or less".into()),
             },
-            RegImmMem::Mem(mem) => todo!(),
+            RegMemImm::Mem(mem) => todo!(),
         }
         Ok(())
     }