x86_64 arch + asm start

src/backend/arch/mod.rs

@@ -0,0 +1 @@
+pub mod x86_64;

src/backend/arch/x86_64.rs

@@ -0,0 +1,63 @@
+pub struct Reg(u8);
+
+pub struct RegMode {
+    reg: Reg,
+    mode: BitMode,
+}
+
+macro_rules! def_regs {
+    ($($val:literal $reg:ident: $B64:literal $B32:literal $B16:literal $B8:literal $($B16H:literal)?,)*) => {
+        impl Reg {
+            $(
+            pub const $reg: u8 = $val;
+            )*
+        }
+        impl RegMode {
+            pub fn parse(s: &str) -> Option<Self> {
+                let (reg, mode) = match s.to_lowercase().as_str() {
+                    $(
+                    $B64 => ($val, BitMode::B64),
+                    $B32 => ($val, BitMode::B32),
+                    $B16 => ($val, BitMode::B16),
+                    $B8 => ($val, BitMode::B8),
+                    $($B16H => ($val, BitMode::B16H),)?
+                    )*
+                    _ => return None,
+                };
+                Some(RegMode {
+                    reg: Reg(reg),
+                    mode,
+                })
+            }
+        }
+    };
+}
+
+def_regs! {
+    0b0000 A : "rax" "eax" "ax" "al" "ah",
+    0b0001 C : "rcx" "ecx" "cx" "cl" "ch",
+    0b0010 D : "rdx" "edx" "dx" "dl" "dh",
+    0b0011 B : "rbx" "ebx" "bx" "bl" "bh",
+
+    0b0100 SP: "rsp" "esp" "sp" "spl",
+    0b0101 BP: "rbp" "ebp" "bp" "sbl",
+    0b0110 SI: "rsi" "esi" "si" "sil",
+    0b0111 DI: "rdi" "edi" "di" "dil",
+
+    0b1000 R8 : "r8"  "r8d"  "r8w"  "r8b",
+    0b1001 R9 : "r9"  "r9d"  "r9w"  "r9b",
+    0b1010 R10: "r10" "r10d" "r10w" "r10b",
+    0b1011 R11: "r11" "r11d" "r11w" "r11b",
+    0b1100 R12: "r12" "r12d" "r12w" "r12b",
+    0b1101 R13: "r13" "r13d" "r13w" "r13b",
+    0b1110 R14: "r14" "r14d" "r14w" "r14b",
+    0b1111 R15: "r15" "r15d" "r15w" "r15b",
+}
+
+pub enum BitMode {
+    B64,
+    B32,
+    B16,
+    B16H,
+    B8,
+}

src/backend/mod.rs

@@ -0,0 +1 @@
+pub mod arch;