From 7e81483f8e440511298bbc4c59e29e47b57faf3f Mon Sep 17 00:00:00 2001 From: Bryan McShea Date: Tue, 27 Jan 2026 17:34:29 -0500 Subject: [PATCH] updated + alignment does not exist --- kernel/.cargo/config.toml | 2 +- kernel/src/arch/riscv64/init.rs | 17 +- kernel/src/arch/riscv64/interrupts.rs | 2 +- kernel/src/arch/riscv64/qemu.rs | 41 - kernel/src/dev/fdt.rs | 184 ++-- kernel/src/dev/mem.rs | 3 +- kernel/src/dev/mod.rs | 2 +- kernel/src/dev/pci.rs | 14 - kernel/src/dev/pci/class.rs | 98 +++ kernel/src/dev/pci/header.rs | 84 ++ kernel/src/dev/pci/mod.rs | 45 + kernel/src/dev/uart.rs | 23 + kernel/src/log.rs | 40 + kernel/src/main.rs | 14 +- kernel/src/mem/heap.rs | 2 +- kernel/src/qemu.rs | 11 - kernel/src/test/mod.rs | 1 + kernel/stuff | 1128 ++++++------------------- runner/Cargo.lock | 977 +++++---------------- 19 files changed, 875 insertions(+), 1813 deletions(-) delete mode 100644 kernel/src/dev/pci.rs create mode 100644 kernel/src/dev/pci/class.rs create mode 100644 kernel/src/dev/pci/header.rs create mode 100644 kernel/src/dev/pci/mod.rs create mode 100644 kernel/src/log.rs diff --git a/kernel/.cargo/config.toml b/kernel/.cargo/config.toml index 0b867da..aeccad5 100644 --- a/kernel/.cargo/config.toml +++ b/kernel/.cargo/config.toml @@ -8,7 +8,7 @@ rustflags = [ "-C", "link-arg=-Tsrc/arch/riscv64/link.ld", "-C", "link-arg=--omagic", ] -runner = "qemu-system-riscv64 -nographic -semihosting -cpu rv64 -machine virt -bios none -smp 4 -m 1G -device virtio-blk-pci,drive=test -drive file=test.raw,format=raw,id=test -kernel" +runner = "qemu-system-riscv64 -nographic -semihosting -cpu rv64 -machine virt -bios none -smp 4 -m 1G -device virtio-blk-pci,drive=mewhen -drive file=test.raw,format=raw,id=mewhen -kernel" [unstable] build-std = ["core", "compiler_builtins", "alloc"] diff --git a/kernel/src/arch/riscv64/init.rs b/kernel/src/arch/riscv64/init.rs index 8bbda9f..8f60b04 100644 --- a/kernel/src/arch/riscv64/init.rs +++ b/kernel/src/arch/riscv64/init.rs @@ -1,4 +1,4 @@ -use core::{arch::asm, ops::Range}; +use core::{arch::naked_asm, ops::Range}; use crate::{ arch::{asm, csr, interrupts, paging, wait}, @@ -8,9 +8,9 @@ use crate::{ #[no_mangle] #[link_section = ".text.init"] -#[naked] -unsafe extern "C" fn _start() -> ! { - asm!( +#[unsafe(naked)] +unsafe extern "C" fn _start() { + naked_asm!( // disable interrupts "csrw mie, zero", // set up gp & sp @@ -31,15 +31,13 @@ unsafe extern "C" fn _start() -> ! { "la t0, {init}", "csrw mepc, t0", "mret", - init = sym init, - options(noreturn) ); } -#[naked] +#[unsafe(naked)] pub unsafe extern "C" fn to_supervisor() { - asm!( + naked_asm!( "li t0, (1 << 8) | (1 << 5)", "csrw sstatus, t0", "li t0, (7 << 0) | (1 << 3)", @@ -53,7 +51,6 @@ pub unsafe extern "C" fn to_supervisor() { "csrw sepc, t0", "sfence.vma", "sret", - options(noreturn) ); } @@ -64,7 +61,7 @@ pub unsafe fn init() -> ! { wait(); } interrupts::init(); - let fdt = FDT::from_addr(dt_addr); + let fdt = FDT::from_addr(dt_addr).expect("Failed to parse fdt"); let raw_mem_range = fdt.mem_range().expect("we lost guys"); let heap_start = paging::init(raw_mem_range.end()); let heap_mem = Range { diff --git a/kernel/src/arch/riscv64/interrupts.rs b/kernel/src/arch/riscv64/interrupts.rs index d6d99d8..d001173 100644 --- a/kernel/src/arch/riscv64/interrupts.rs +++ b/kernel/src/arch/riscv64/interrupts.rs @@ -4,7 +4,7 @@ pub fn init() { csr::mtvec::init!(stuff); } -#[repr(align(4))] +#[rustc_align(4)] pub fn stuff() -> ! { let mcause = csr::mcause::read(); crate::println!("interrupt triggered: {mcause:?}"); diff --git a/kernel/src/arch/riscv64/qemu.rs b/kernel/src/arch/riscv64/qemu.rs index b5dd54e..5aa80df 100644 --- a/kernel/src/arch/riscv64/qemu.rs +++ b/kernel/src/arch/riscv64/qemu.rs @@ -1,35 +1,5 @@ -use core::fmt::{self, Write}; - -use crate::util::mutex::Mutex; use core::arch::asm; -// --machine sifive_u -// const UART_BASE: u32 = 0x10010000; -// --machine virt -const UART_BASE: u32 = 0x10000000; -static UART: Mutex = Mutex::new(Uart::new(UART_BASE)); - -struct Uart { - base: u32, -} - -impl Uart { - pub const fn new(base: u32) -> Self { - Self { base } - } -} - -impl fmt::Write for Uart { - fn write_str(&mut self, s: &str) -> fmt::Result { - for b in s.as_bytes() { - #[allow(clippy::while_immutable_condition)] - while unsafe { *(self.base as *mut i32) } < 0 {} - unsafe { *(self.base as *mut i32) = *b as i32 } - } - Ok(()) - } -} - pub fn exit(code: usize) -> ! { let data = [0x20026, code]; unsafe { @@ -53,14 +23,3 @@ unsafe fn semihost(call: usize, data: *const u8) { ) } -pub fn _print(args: core::fmt::Arguments<'_>) { - // NOTE: something really dumb can happen here; - // if you evaluate an expression in a print statement, and that - // causes an interrupt, this will be left locked... - // Should I set up the heap before interrupts? or just avoid printing until both...? - // or maybe force unlock if there's an interrupt? - // or store the hart in the lock, and unlock if that hart was interrupted?? - // or just have a constant-sized buffer? - // or create a "locked writer"? - UART.lock().write_fmt(args).unwrap(); -} diff --git a/kernel/src/dev/fdt.rs b/kernel/src/dev/fdt.rs index 2efb579..70212bf 100644 --- a/kernel/src/dev/fdt.rs +++ b/kernel/src/dev/fdt.rs @@ -58,31 +58,28 @@ pub struct RawProp { pub struct FDT { pub header: &'static Header, - pub nodes: &'static [u8], + pub root: Node, pub strings: &'static [u8], } impl FDT { - pub fn nodes(&self) -> NodeIter { - NodeIter { - pos: self.nodes, - strings: self.strings, - } - } - pub fn root(&self) -> Option { - self.nodes().next() - } - pub unsafe fn from_addr(addr: *mut u8) -> Self { + pub unsafe fn from_addr(addr: *mut u8) -> Result { let header: &Header = &*(addr as *const Header); if header.magic.get() != MAGIC { - panic!("fdt magic wrong"); + return Err("fdt magic wrong"); } let data = slice::from_raw_parts(addr, header.totalsize.get() as usize); - Self { + let strings = &data[header.off_dt_strings.get() as usize..]; + let node_data = &data[header.off_dt_struct.get() as usize..]; + let root = match Node::from_bytes(node_data, strings) { + Some((node, _)) => node, + None => return Err("Could not parse nodes") + }; + Ok(Self { header, - nodes: &data[header.off_dt_struct.get() as usize..], - strings: &data[header.off_dt_strings.get() as usize..], - } + root, + strings, + }) } } @@ -107,6 +104,82 @@ impl Debug for Node { } impl Node { + pub fn from_bytes(bytes: &'static [u8], strings: &'static [u8]) -> Option<(Self, &'static [u8])> { + // first make sure this is actually a node + let mut pos = bytes; + if pos.is_empty() { + return None; + } + let token: Token = Token::from_bytes(pos)?; + let Token::BeginNode = token else { + return None; + }; + pos = &pos[4..]; + // then get the name + let name_start = pos; + let extra; + 'outer: loop { + let bytes = &pos[..4]; + pos = &pos[4..]; + for (i, byte) in bytes.iter().enumerate() { + if *byte == 0 { + extra = 4 - i; + break 'outer; + } + } + } + let name = core::str::from_utf8(&name_start[..name_start.len() - pos.len() - extra]) + .expect("har har har har har har har har har har. RAAAAAAAAAAAAAAAAAAAAAAAA"); + // then props + let node_start = pos; + let node_data = if let Some(prop) = (PropIter { + strings, + pos, + }) + .last() + { + let node_len = + (prop.data.as_ptr() as usize + prop.data.len()) - pos.as_ptr() as usize; + pos = &pos[node_len..]; + &node_start[..node_len] + } else { + &[] + }; + // then children + let children = match Token::from_bytes(pos) { + Some(Token::EndNode | Token::End) => { + pos = &pos[4..]; + &[] + } + Some(Token::BeginNode) => { + let children = pos; + let mut iter = NodeIter { + pos: children, + strings, + }; + // skip children pos + for _ in iter.by_ref() {} + pos = iter.pos; + match Token::from_bytes(pos) { + Some(Token::EndNode | Token::End) => pos = &pos[4..], + _ => panic!("wut du heeeeeal (toaken)"), + } + children + } + _ => { + println!("WARNING: token stuff XD"); + &[] + } + }; + // done + Some((Node { + name, + props: node_data, + strings, + children, + },pos)) + } + pub fn children(&self) -> NodeIter { NodeIter { pos: self.children, @@ -191,85 +264,16 @@ impl Iterator for PropIter { pub struct NodeIter { // I should make a type called ByteCursor or something for this // so dealing with it is not cursed and dependent on data type - pub pos: &'static [u8], - pub strings: &'static [u8], + pos: &'static [u8], + strings: &'static [u8], } impl Iterator for NodeIter { type Item = Node; fn next(&mut self) -> Option { - // first make sure this is actually a node - if self.pos.is_empty() { - return None; - } - let token: Token = Token::from_bytes(self.pos)?; - let Token::BeginNode = token else { - return None; - }; - self.pos = &self.pos[4..]; - // then get the name - let name_start = self.pos; - let extra; - 'outer: loop { - let bytes = &self.pos[..4]; - self.pos = &self.pos[4..]; - for (i, byte) in bytes.iter().enumerate() { - if *byte == 0 { - extra = 4 - i; - break 'outer; - } - } - } - let name = core::str::from_utf8(&name_start[..name_start.len() - self.pos.len() - extra]) - .expect("har har har har har har har har har har. RAAAAAAAAAAAAAAAAAAAAAAAA"); - // then props - let node_start = self.pos; - let node_data = if let Some(prop) = (PropIter { - strings: self.strings, - pos: self.pos, - }) - .last() - { - let node_len = - (prop.data.as_ptr() as usize + prop.data.len()) - self.pos.as_ptr() as usize; - self.pos = &self.pos[node_len..]; - &node_start[..node_len] - } else { - &[] - }; - // then children - let children = match Token::from_bytes(self.pos) { - Some(Token::EndNode | Token::End) => { - self.pos = &self.pos[4..]; - &[] - } - Some(Token::BeginNode) => { - let children = self.pos; - let mut iter = Self { - pos: children, - strings: self.strings, - }; - // skip children bytes - for _ in iter.by_ref() {} - self.pos = iter.pos; - match Token::from_bytes(self.pos) { - Some(Token::EndNode | Token::End) => self.pos = &self.pos[4..], - _ => panic!("wut du heeeeeal (toaken)"), - } - children - } - _ => { - println!("WARNING: token stuff XD"); - &[] - } - }; - // done - Some(Node { - name, - props: node_data, - strings: self.strings, - children, - }) + let (node, pos) = Node::from_bytes(self.pos, self.strings)?; + self.pos = pos; + Some(node) } } diff --git a/kernel/src/dev/mem.rs b/kernel/src/dev/mem.rs index abcd9e2..3e9a473 100644 --- a/kernel/src/dev/mem.rs +++ b/kernel/src/dev/mem.rs @@ -10,8 +10,9 @@ use super::fdt::FDT; impl FDT { pub fn mem_range(&self) -> Option { - let reg = self.root()?.child("memory")?.prop("reg")?; + let reg = self.root.child("memory")?.prop("reg")?; let data = reg.data.chunks(size_of::()).next()?; + // for now just get first let data: [u8; size_of::()] = data.try_into().unwrap(); unsafe { Some(transmute::<[u8; 16], FDTMemRange>(data)) } } diff --git a/kernel/src/dev/mod.rs b/kernel/src/dev/mod.rs index 0476720..2b69f95 100644 --- a/kernel/src/dev/mod.rs +++ b/kernel/src/dev/mod.rs @@ -1,4 +1,4 @@ pub mod fdt; pub mod mem; -pub mod uart; pub mod pci; +pub mod uart; diff --git a/kernel/src/dev/pci.rs b/kernel/src/dev/pci.rs deleted file mode 100644 index 884cc4c..0000000 --- a/kernel/src/dev/pci.rs +++ /dev/null @@ -1,14 +0,0 @@ -use crate::println; - -use super::fdt::FDT; - -impl FDT { - pub fn pci_devs(&self) -> Option<()> { - // for dev in self.nodes() { - // println!("{:#?}", dev); - // } - let node = self.root()?.child("soc")?.child("pci")?; - println!("{:#?}", node); - None - } -} diff --git a/kernel/src/dev/pci/class.rs b/kernel/src/dev/pci/class.rs new file mode 100644 index 0000000..4e1b498 --- /dev/null +++ b/kernel/src/dev/pci/class.rs @@ -0,0 +1,98 @@ +use super::header::HeaderStart; + +// this is technically less performant than making 16^2 values, +// but that cannot be worth it lmao + +// Reserved(u8) is a lot nicer than literally hundreds of enum values +#[derive(Debug)] +pub enum Class { + Unclassified, + MassStorageController, + NetworkController, + DisplayController, + MultimediaController, + MemoryController, + Bridge(Bridge), + SimpleCommunicationController, + BaseSystemPeripheral, + InputDeviceController, + DockingStation, + Processor, + SerialBusController, + WirelessController, + IntelligentController, + SatelliteCommunicationController, + EncryptionController, + SignalProcessingController, + ProcessingAccelerator, + NonEssentialInstrumentation, + CoProcessor, + UnassignedClass, + Reserved(u8), +} + +impl Class { + pub fn from_header(header: &HeaderStart) -> Self { + match header.class_code { + 0x0 => Self::Unclassified, + 0x1 => Self::MassStorageController, + 0x2 => Self::NetworkController, + 0x3 => Self::DisplayController, + 0x4 => Self::MultimediaController, + 0x5 => Self::MemoryController, + 0x6 => Self::Bridge(Bridge::from_header(header)), + 0x7 => Self::SimpleCommunicationController, + 0x8 => Self::BaseSystemPeripheral, + 0x9 => Self::InputDeviceController, + 0xa => Self::DockingStation, + 0xb => Self::Processor, + 0xc => Self::SerialBusController, + 0xd => Self::WirelessController, + 0xe => Self::IntelligentController, + 0xf => Self::SatelliteCommunicationController, + 0x10 => Self::EncryptionController, + 0x11 => Self::SignalProcessingController, + 0x12 => Self::ProcessingAccelerator, + 0x13 => Self::NonEssentialInstrumentation, + 0x40 => Self::CoProcessor, + 0xff => Self::UnassignedClass, + c => Self::Reserved(c), + } + } +} + +#[derive(Debug)] +pub enum Bridge { + Host, + ISA, + EISA, + MCA, + PCIToPCI, + PCMCIA, + NuBus, + CardBus, + RACEway, + PCIToPCISemiTransparent, + InfiniBandtoPCIHost, + Other, + Unknown(u8), +} + +impl Bridge { + pub fn from_header(header: &HeaderStart) -> Self { + match header.subclass { + 0x0 => Self::Host, + 0x1 => Self::ISA, + 0x2 => Self::EISA, + 0x3 => Self::MCA, + 0x4 => Self::PCIToPCI, + 0x5 => Self::PCMCIA, + 0x6 => Self::NuBus, + 0x7 => Self::CardBus, + 0x8 => Self::RACEway, + 0x9 => Self::PCIToPCISemiTransparent, + 0x0A => Self::InfiniBandtoPCIHost, + 0x80 => Self::Other, + s => Self::Unknown(s), + } + } +} diff --git a/kernel/src/dev/pci/header.rs b/kernel/src/dev/pci/header.rs new file mode 100644 index 0000000..63682ba --- /dev/null +++ b/kernel/src/dev/pci/header.rs @@ -0,0 +1,84 @@ +use super::class::Class; + +#[derive(Debug, Clone, Copy)] +#[repr(C)] +pub struct HeaderStart { + pub vendor_id: u16, + pub device_id: u16, + pub command: u16, + pub status: u16, + pub rev_id: u8, + pub prog_if: u8, + pub subclass: u8, + pub class_code: u8, + pub cache_line_size: u8, + pub latency_timer: u8, + pub header_type: u8, + pub bist: u8, +} + +impl HeaderStart { + pub fn class(&self) -> Class { + Class::from_header(self) + } + pub fn vendor(&self) -> Vendor { + Vendor::from_header(self) + } +} + +#[derive(Debug, Clone, Copy)] +#[repr(C)] +pub struct GeneralHeader { + pub start: HeaderStart, + pub bar0: u32, + pub bar1: u32, + pub bar2: u32, + pub bar3: u32, + pub bar4: u32, + pub bar5: u32, + pub cardbus_cis_pointer: u32, + pub subsystem_vendor_id: u16, + pub subsystem_id: u16, + pub expansion_rom_base_addr: u32, + pub capabilities: u8, + pub reserved: [u8; 7], + pub interrupt_line: u8, + pub interrupt_pin: u8, + pub min_grant: u8, + pub max_latency: u8, +} + +// due to how large this is and how it can change, +// this seems like not the best use case for enums +// but that's entirely a later problem +#[derive(Debug)] +pub enum Vendor { + RedHat(RedHatDevice), + Unknown(u16), +} + +impl Vendor { + pub fn from_header(header: &HeaderStart) -> Self { + let id = header.device_id; + match header.vendor_id { + 0x1b36 => Self::RedHat(RedHatDevice::from_id(id)), + i => Self::Unknown(i), + } + } +} + +#[derive(Debug)] +pub enum RedHatDevice { + QemuPCIeHostBridge, + Unknown(u16), +} + +impl RedHatDevice { + pub fn from_id(id: u16) -> Self { + match id { + 0x0008 => Self::QemuPCIeHostBridge, + id => Self::Unknown(id), + } + } +} + diff --git a/kernel/src/dev/pci/mod.rs b/kernel/src/dev/pci/mod.rs new file mode 100644 index 0000000..4458667 --- /dev/null +++ b/kernel/src/dev/pci/mod.rs @@ -0,0 +1,45 @@ +use super::fdt::FDT; +use crate::{dev::pci::header::{GeneralHeader, HeaderStart}, println, util::bits::Be}; +use core::mem::transmute; + +pub mod header; +pub mod class; + +impl FDT { + pub fn pci_devs(&self) -> Option<()> { + // for dev in self.nodes() { + // println!("{:#?}", dev); + // } + let node = self.root.child("soc")?.child("pci")?; + // should make handling reg field nicer + let data = node.prop("reg")?.data; + println!("{:#?}", node); + let addr = unsafe { + transmute::<[u8; 8], Be>([ + data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7], + ]) + }; + let addr = addr.get() as *mut u8; + let len = unsafe { + transmute::<[u8; 8], Be>([ + data[8], data[9], data[10], data[11], data[12], data[13], data[14], data[15], + ]) + }; + let len = len.get() as usize; + println!("{:?}..{:?}", addr, unsafe { addr.byte_add(len) }); + unsafe { + let header = *(addr as *mut HeaderStart); + if header.header_type != 0 { + panic!("nooooooooooooo"); + } + let header = addr as *mut GeneralHeader; + println!("device: {:?}", (*header).start.vendor()); + println!("class: {:?}", (*header).start.class()); + println!("{:#?}", *header); + (*header).start.command = 0b0000_0000_0000_0110; + for _ in 0..1000000 {} + println!("{:b}", (*header).start.status); + } + None + } +} diff --git a/kernel/src/dev/uart.rs b/kernel/src/dev/uart.rs index e69de29..6a2921c 100644 --- a/kernel/src/dev/uart.rs +++ b/kernel/src/dev/uart.rs @@ -0,0 +1,23 @@ +use core::fmt; + +pub struct Uart { + base: u32, +} + +impl Uart { + pub const fn new(base: u32) -> Self { + Self { base } + } +} + +impl fmt::Write for Uart { + fn write_str(&mut self, s: &str) -> fmt::Result { + for b in s.as_bytes() { + #[allow(clippy::while_immutable_condition)] + while unsafe { *(self.base as *mut i32) } < 0 {} + unsafe { *(self.base as *mut i32) = *b as i32 } + } + Ok(()) + } +} + diff --git a/kernel/src/log.rs b/kernel/src/log.rs new file mode 100644 index 0000000..a72f413 --- /dev/null +++ b/kernel/src/log.rs @@ -0,0 +1,40 @@ +use core::fmt::Write; + +use crate::{dev::{fdt::FDT, uart::Uart}, util::mutex::Mutex}; + +// ok now it uses soc->serial, might be chillin? +// --machine sifive_u +// const UART_BASE: u32 = 0x10010000; +// --machine virt +const UART_BASE: u32 = 0x10000000; +static UART: Mutex = Mutex::new(Uart::new(UART_BASE)); + +#[macro_export] +macro_rules! print { + ($($arg:tt)*) => ($crate::log::_print(format_args!($($arg)*))); +} + +#[macro_export] +macro_rules! println { + () => ($crate::print!("\n")); + ($($arg:tt)*) => ($crate::print!("{}\n", format_args!($($arg)*))); +} + +pub fn init(dt: &FDT) -> Option<()> { + let node = dt.root.child("soc")?.child("serial")?; + let addr = u32::from_str_radix(node.address()?, 16).ok()?; + *UART.lock() = Uart::new(addr); + Some(()) +} + +pub fn _print(args: core::fmt::Arguments<'_>) { + // NOTE: something really dumb can happen here; + // if you evaluate an expression in a print statement, and that + // causes an interrupt, this will be left locked... + // Should I set up the heap before interrupts? or just avoid printing until both...? + // or maybe force unlock if there's an interrupt? + // or store the hart in the lock, and unlock if that hart was interrupted?? + // or just have a constant-sized buffer? + // or create a "locked writer"? + UART.lock().write_fmt(args).unwrap(); +} diff --git a/kernel/src/main.rs b/kernel/src/main.rs index 9c265c4..d1a5dd5 100644 --- a/kernel/src/main.rs +++ b/kernel/src/main.rs @@ -1,7 +1,6 @@ #![no_std] #![no_main] #![feature(abi_x86_interrupt)] -#![feature(naked_functions)] #![feature(fn_align)] #![feature(custom_test_frameworks)] #![test_runner(crate::test::test_runner)] @@ -15,6 +14,7 @@ extern crate alloc; pub mod arch; pub mod dev; +pub mod log; pub mod mem; pub mod qemu; #[cfg(test)] @@ -23,7 +23,7 @@ pub mod util; pub struct StartInfo { mem_range: Range<*mut u8>, - dt: FDT + dt: FDT, } pub fn start(info: StartInfo) -> ! { @@ -39,12 +39,18 @@ pub fn start(info: StartInfo) -> ! { } pub fn main(info: StartInfo) { + log::init(&info.dt); println!("we out here vibin"); - println!("memory range: {:?}", info.mem_range); + // println!("memory range: {:?}", info.mem_range); unsafe { ALLOCATOR.init(&info.mem_range); } - info.dt.pci_devs(); + // info.dt.pci_devs(); + // println!("{:#?}", info.dt.root); + let test = alloc::vec![1u8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12]; + let test2 = alloc::vec![1u8, 2, 3, 4]; + drop(test); + ALLOCATOR.heap().print(); } #[panic_handler] diff --git a/kernel/src/mem/heap.rs b/kernel/src/mem/heap.rs index c70e42c..4e33a77 100644 --- a/kernel/src/mem/heap.rs +++ b/kernel/src/mem/heap.rs @@ -157,7 +157,7 @@ impl Heap { return data; } } - return null_mut(); + null_mut() } pub unsafe fn dealloc(&mut self, ptr: *mut u8, _: core::alloc::Layout) { diff --git a/kernel/src/qemu.rs b/kernel/src/qemu.rs index 710c870..83e713c 100644 --- a/kernel/src/qemu.rs +++ b/kernel/src/qemu.rs @@ -1,12 +1 @@ pub use crate::arch::qemu::*; - -#[macro_export] -macro_rules! print { - ($($arg:tt)*) => ($crate::arch::qemu::_print(format_args!($($arg)*))); -} - -#[macro_export] -macro_rules! println { - () => ($crate::print!("\n")); - ($($arg:tt)*) => ($crate::print!("{}\n", format_args!($($arg)*))); -} diff --git a/kernel/src/test/mod.rs b/kernel/src/test/mod.rs index a0b2eed..0d9e905 100644 --- a/kernel/src/test/mod.rs +++ b/kernel/src/test/mod.rs @@ -79,6 +79,7 @@ pub fn run_tests() -> ! { } fn prepare(info: &StartInfo) { + crate::log::init(&info.dt); unsafe { ALLOCATOR.reset(&info.mem_range); } diff --git a/kernel/stuff b/kernel/stuff index 915b634..2dd7e61 100644 --- a/kernel/stuff +++ b/kernel/stuff @@ -1,879 +1,253 @@ we out here vibin -memory range: 0x81626000..0xc0000000 -Node { - name: "", - props: [ - Prop { - name: "#address-cells", - data_len: 4, - }, - Prop { - name: "#size-cells", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 16, - }, - Prop { - name: "model", - data_len: 20, - }, - ], - children: [ - Node { - name: "poweroff", - props: [ - Prop { - name: "value", - data_len: 4, - }, - Prop { - name: "offset", - data_len: 4, - }, - Prop { - name: "regmap", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 16, - }, - ], - children: [], - }, - Node { - name: "reboot", - props: [ - Prop { - name: "value", - data_len: 4, - }, - Prop { - name: "offset", - data_len: 4, - }, - Prop { - name: "regmap", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 16, - }, - ], - children: [], - }, - Node { - name: "platform-bus@4000000", - props: [ - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "ranges", - data_len: 16, - }, - Prop { - name: "#address-cells", - data_len: 4, - }, - Prop { - name: "#size-cells", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 28, - }, - ], - children: [], - }, - Node { - name: "memory@80000000", - props: [ - Prop { - name: "device_type", - data_len: 8, - }, - Prop { - name: "reg", - data_len: 16, - }, - ], - children: [], - }, - Node { - name: "cpus", - props: [ - Prop { - name: "#address-cells", - data_len: 4, - }, - Prop { - name: "#size-cells", - data_len: 4, - }, - Prop { - name: "timebase-frequency", - data_len: 4, - }, - ], - children: [ - Node { - name: "cpu@0", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "device_type", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 4, - }, - Prop { - name: "status", - data_len: 8, - }, - Prop { - name: "compatible", - data_len: 8, - }, - Prop { - name: "riscv,cboz-block-size", - data_len: 4, - }, - Prop { - name: "riscv,cbom-block-size", - data_len: 4, - }, - Prop { - name: "riscv,isa", - data_len: 124, - }, - Prop { - name: "mmu-type", - data_len: 12, - }, - ], - children: [ - Node { - name: "interrupt-controller", - props: [ - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - Prop { - name: "interrupt-controller", - data_len: 0, - }, - Prop { - name: "compatible", - data_len: 16, - }, - Prop { - name: "phandle", - data_len: 4, - }, - ], - children: [], - }, - ], - }, - Node { - name: "cpu@1", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "device_type", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 4, - }, - Prop { - name: "status", - data_len: 8, - }, - Prop { - name: "compatible", - data_len: 8, - }, - Prop { - name: "riscv,cboz-block-size", - data_len: 4, - }, - Prop { - name: "riscv,cbom-block-size", - data_len: 4, - }, - Prop { - name: "riscv,isa", - data_len: 124, - }, - Prop { - name: "mmu-type", - data_len: 12, - }, - ], - children: [ - Node { - name: "interrupt-controller", - props: [ - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - Prop { - name: "interrupt-controller", - data_len: 0, - }, - Prop { - name: "compatible", - data_len: 16, - }, - Prop { - name: "phandle", - data_len: 4, - }, - ], - children: [], - }, - ], - }, - Node { - name: "cpu@2", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "device_type", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 4, - }, - Prop { - name: "status", - data_len: 8, - }, - Prop { - name: "compatible", - data_len: 8, - }, - Prop { - name: "riscv,cboz-block-size", - data_len: 4, - }, - Prop { - name: "riscv,cbom-block-size", - data_len: 4, - }, - Prop { - name: "riscv,isa", - data_len: 124, - }, - Prop { - name: "mmu-type", - data_len: 12, - }, - ], - children: [ - Node { - name: "interrupt-controller", - props: [ - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - Prop { - name: "interrupt-controller", - data_len: 0, - }, - Prop { - name: "compatible", - data_len: 16, - }, - Prop { - name: "phandle", - data_len: 4, - }, - ], - children: [], - }, - ], - }, - Node { - name: "cpu@3", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "device_type", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 4, - }, - Prop { - name: "status", - data_len: 8, - }, - Prop { - name: "compatible", - data_len: 8, - }, - Prop { - name: "riscv,cboz-block-size", - data_len: 4, - }, - Prop { - name: "riscv,cbom-block-size", - data_len: 4, - }, - Prop { - name: "riscv,isa", - data_len: 124, - }, - Prop { - name: "mmu-type", - data_len: 12, - }, - ], - children: [ - Node { - name: "interrupt-controller", - props: [ - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - Prop { - name: "interrupt-controller", - data_len: 0, - }, - Prop { - name: "compatible", - data_len: 16, - }, - Prop { - name: "phandle", - data_len: 4, - }, - ], - children: [], - }, - ], - }, - Node { - name: "cpu-map", - props: [], - children: [ - Node { - name: "cluster0", - props: [], - children: [ - Node { - name: "core0", - props: [ - Prop { - name: "cpu", - data_len: 4, - }, - ], - children: [], - }, - Node { - name: "core1", - props: [ - Prop { - name: "cpu", - data_len: 4, - }, - ], - children: [], - }, - Node { - name: "core2", - props: [ - Prop { - name: "cpu", - data_len: 4, - }, - ], - children: [], - }, - Node { - name: "core3", - props: [ - Prop { - name: "cpu", - data_len: 4, - }, - ], - children: [], - }, - ], - }, - ], - }, - ], - }, - Node { - name: "pmu", - props: [ - Prop { - name: "riscv,event-to-mhpmcounters", - data_len: 60, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "fw-cfg@10100000", - props: [ - Prop { - name: "dma-coherent", - data_len: 0, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 20, - }, - ], - children: [], - }, - Node { - name: "flash@20000000", - props: [ - Prop { - name: "bank-width", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 32, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "chosen", - props: [ - Prop { - name: "stdout-path", - data_len: 24, - }, - Prop { - name: "rng-seed", - data_len: 32, - }, - ], - children: [], - }, - Node { - name: "soc", - props: [ - Prop { - name: "#address-cells", - data_len: 4, - }, - Prop { - name: "#size-cells", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 12, - }, - Prop { - name: "ranges", - data_len: 0, - }, - ], - children: [ - Node { - name: "rtc@101000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 20, - }, - ], - children: [], - }, - Node { - name: "serial@10000000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "clock-frequency", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "test@100000", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 36, - }, - ], - children: [], - }, - Node { - name: "pci@30000000", - props: [ - Prop { - name: "interrupt-map-mask", - data_len: 16, - }, - Prop { - name: "interrupt-map", - data_len: 384, - }, - Prop { - name: "ranges", - data_len: 84, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "dma-coherent", - data_len: 0, - }, - Prop { - name: "bus-range", - data_len: 8, - }, - Prop { - name: "linux,pci-domain", - data_len: 4, - }, - Prop { - name: "device_type", - data_len: 4, - }, - Prop { - name: "compatible", - data_len: 24, - }, - Prop { - name: "#size-cells", - data_len: 4, - }, - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - Prop { - name: "#address-cells", - data_len: 4, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10008000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10007000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10006000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10005000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10004000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10003000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10002000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "virtio_mmio@10001000", - props: [ - Prop { - name: "interrupts", - data_len: 4, - }, - Prop { - name: "interrupt-parent", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 12, - }, - ], - children: [], - }, - Node { - name: "plic@c000000", - props: [ - Prop { - name: "phandle", - data_len: 4, - }, - Prop { - name: "riscv,ndev", - data_len: 4, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "interrupts-extended", - data_len: 64, - }, - Prop { - name: "interrupt-controller", - data_len: 0, - }, - Prop { - name: "compatible", - data_len: 32, - }, - Prop { - name: "#address-cells", - data_len: 4, - }, - Prop { - name: "#interrupt-cells", - data_len: 4, - }, - ], - children: [], - }, - Node { - name: "clint@2000000", - props: [ - Prop { - name: "interrupts-extended", - data_len: 64, - }, - Prop { - name: "reg", - data_len: 16, - }, - Prop { - name: "compatible", - data_len: 28, - }, - ], - children: [], - }, - ], - }, - ], +memory range: 0x8161d000..0xc0000000 +pci@30000000 { + interrupt-map-mask: 16, + interrupt-map: 384, + ranges: 84, + reg: 16, + dma-coherent: 0, + bus-range: 8, + linux,pci-domain: 4, + device_type: 4, + compatible: 24, + #size-cells: 4, + #interrupt-cells: 4, + #address-cells: 4, +} + { + #address-cells: 4, + #size-cells: 4, + compatible: 16, + model: 20, + - child: poweroff { + value: 4, + offset: 4, + regmap: 4, + compatible: 16, + }, + - child: reboot { + value: 4, + offset: 4, + regmap: 4, + compatible: 16, + }, + - child: platform-bus@4000000 { + interrupt-parent: 4, + ranges: 16, + #address-cells: 4, + #size-cells: 4, + compatible: 28, + }, + - child: memory@80000000 { + device_type: 8, + reg: 16, + }, + - child: cpus { + #address-cells: 4, + #size-cells: 4, + timebase-frequency: 4, + - child: cpu@0 { + phandle: 4, + device_type: 4, + reg: 4, + status: 8, + compatible: 8, + riscv,cboz-block-size: 4, + riscv,cbom-block-size: 4, + riscv,isa: 124, + mmu-type: 12, + - child: interrupt-controller { + #interrupt-cells: 4, + interrupt-controller: 0, + compatible: 16, + phandle: 4, + }, + }, + - child: cpu@1 { + phandle: 4, + device_type: 4, + reg: 4, + status: 8, + compatible: 8, + riscv,cboz-block-size: 4, + riscv,cbom-block-size: 4, + riscv,isa: 124, + mmu-type: 12, + - child: interrupt-controller { + #interrupt-cells: 4, + interrupt-controller: 0, + compatible: 16, + phandle: 4, + }, + }, + - child: cpu@2 { + phandle: 4, + device_type: 4, + reg: 4, + status: 8, + compatible: 8, + riscv,cboz-block-size: 4, + riscv,cbom-block-size: 4, + riscv,isa: 124, + mmu-type: 12, + - child: interrupt-controller { + #interrupt-cells: 4, + interrupt-controller: 0, + compatible: 16, + phandle: 4, + }, + }, + - child: cpu@3 { + phandle: 4, + device_type: 4, + reg: 4, + status: 8, + compatible: 8, + riscv,cboz-block-size: 4, + riscv,cbom-block-size: 4, + riscv,isa: 124, + mmu-type: 12, + - child: interrupt-controller { + #interrupt-cells: 4, + interrupt-controller: 0, + compatible: 16, + phandle: 4, + }, + }, + - child: cpu-map { + - child: cluster0 { + - child: core0 { + cpu: 4, + }, + - child: core1 { + cpu: 4, + }, + - child: core2 { + cpu: 4, + }, + - child: core3 { + cpu: 4, + }, + }, + }, + }, + - child: pmu { + riscv,event-to-mhpmcounters: 60, + compatible: 12, + }, + - child: fw-cfg@10100000 { + dma-coherent: 0, + reg: 16, + compatible: 20, + }, + - child: flash@20000000 { + bank-width: 4, + reg: 32, + compatible: 12, + }, + - child: chosen { + stdout-path: 24, + rng-seed: 32, + }, + - child: soc { + #address-cells: 4, + #size-cells: 4, + compatible: 12, + ranges: 0, + - child: rtc@101000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 20, + }, + - child: serial@10000000 { + interrupts: 4, + interrupt-parent: 4, + clock-frequency: 4, + reg: 16, + compatible: 12, + }, + - child: test@100000 { + phandle: 4, + reg: 16, + compatible: 36, + }, + - child: pci@30000000 { + interrupt-map-mask: 16, + interrupt-map: 384, + ranges: 84, + reg: 16, + dma-coherent: 0, + bus-range: 8, + linux,pci-domain: 4, + device_type: 4, + compatible: 24, + #size-cells: 4, + #interrupt-cells: 4, + #address-cells: 4, + }, + - child: virtio_mmio@10008000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10007000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10006000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10005000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10004000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10003000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10002000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: virtio_mmio@10001000 { + interrupts: 4, + interrupt-parent: 4, + reg: 16, + compatible: 12, + }, + - child: plic@c000000 { + phandle: 4, + riscv,ndev: 4, + reg: 16, + interrupts-extended: 64, + interrupt-controller: 0, + compatible: 32, + #address-cells: 4, + #interrupt-cells: 4, + }, + - child: clint@2000000 { + interrupts-extended: 64, + reg: 16, + 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