313 lines
9.0 KiB
Rust
313 lines
9.0 KiB
Rust
use crate::{
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backend::{
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program::{Addr, SymTable},
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symbol::Symbol,
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},
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io::CompilerMsg,
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};
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pub struct Asm {
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pub instrs: Vec<Instr>,
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}
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pub enum Instr {
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Mov { dst: RegMode, src: RegImm },
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Int { code: u8 },
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Lea { dst: RegMode, sym: Symbol },
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}
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pub enum RegImm {
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Reg(RegMode),
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Imm(u64),
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}
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pub struct Reg(u8);
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pub struct RegMode {
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reg: Reg,
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width: BitWidth,
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high: bool,
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}
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impl super::super::program::Instr for Instr {
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fn encode(
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&self,
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data: &mut Vec<u8>,
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syms: &mut SymTable,
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) -> Result<Option<(Symbol, usize)>, CompilerMsg> {
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match self {
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Instr::Mov { dst, src } => {
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let width = dst.width;
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if width == BitWidth::B16 {
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data.push(0x66);
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}
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let dst8 = dst.gt8();
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let b64 = width == BitWidth::B64;
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let b8 = width == BitWidth::B8;
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let src8 = if let RegImm::Reg(src) = src {
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src.gt8()
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} else {
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false
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};
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// special 64-bit / register 4-7 indicator
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if dst8 || src8 || b64 || (dst.gt4() && !dst.high) {
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data.push(0x40 | dst8 as u8 | ((b64 as u8) << 3) | ((src8 as u8) << 2));
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}
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match src {
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RegImm::Reg(src) => {
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if dst.width != src.width {
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return Err("src and dst are not the same size".into());
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}
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data.push(0x88 | !b8 as u8);
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let modrm = 0b11_000_000 | (src.base() << 3) | dst.base();
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data.push(modrm);
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}
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&RegImm::Imm(imm) => {
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if imm > width.max() {
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return Err("immediate cannot fit in register".into());
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}
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data.push(0xb0 | ((!b8 as u8) << 3) | dst.base());
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data.extend(&imm.to_le_bytes()[..width.bytes()]);
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}
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}
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}
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Instr::Int { code } => data.extend([0xcd, *code]),
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Instr::Lea { dst, sym } => {
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data.extend([
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0x48 | ((dst.gt8() as u8) << 2),
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0x8d,
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0x05 | (dst.base() << 3),
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]);
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let Some(addr) = syms.get(*sym) else {
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let pos = data.len();
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data.extend([0; 4]);
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return Ok(Some((*sym, pos)));
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};
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data.extend(addr_offset(data.len(), addr));
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}
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}
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Ok(None)
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}
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fn insert_sym(&self, data: &mut Vec<u8>, pos: usize, addr: Addr) {
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match self {
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Self::Lea { .. } => data[pos..pos + 4].copy_from_slice(&addr_offset(pos, addr)),
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_ => panic!("unkown symbol insertion"),
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}
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}
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}
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/// assumes the next instruction is directly after
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fn addr_offset(pos: usize, addr: Addr) -> [u8; 4] {
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let pos = (pos + 4) as i32;
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let offset = addr.val() as i32 - pos;
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offset.to_le_bytes()
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}
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impl RegMode {
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pub fn base(&self) -> u8 {
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self.reg.0 & 0b111
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}
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/// checks if register is not one of the first 8 (0-7)
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pub fn gt8(&self) -> bool {
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self.reg.0 >= 0b1000
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}
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pub fn gt4(&self) -> bool {
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self.reg.0 >= 0b0100
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}
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}
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macro_rules! def_regs {
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($($val:literal : $B64:ident $B32:ident $B16:ident $B8:ident $($B8H:ident=$hval:expr)?,)*) => {
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#[allow(non_upper_case_globals)]
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pub mod reg {
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use super::{RegMode, BitWidth, Reg};
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$(
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pub const $B64: RegMode = RegMode { reg: Reg($val), width: BitWidth::B64, high: false };
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pub const $B32: RegMode = RegMode { reg: Reg($val), width: BitWidth::B32, high: false };
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pub const $B16: RegMode = RegMode { reg: Reg($val), width: BitWidth::B16, high: false };
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pub const $B8 : RegMode = RegMode { reg: Reg($val), width: BitWidth::B8, high: false };
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$(
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pub const $B8H: RegMode = RegMode { reg: $hval.reg, width: BitWidth::B8, high: true };
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)?
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)*
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}
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impl RegMode {
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pub fn parse(s: &str) -> Option<Self> {
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Some(match s.to_lowercase().as_str() {
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$(
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stringify!($B64) => reg::$B64,
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stringify!($B32) => reg::$B32,
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stringify!($B16) => reg::$B16,
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stringify!($B8 ) => reg::$B8,
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$(
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stringify!($B8H) => reg::$B8H,
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)?
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)*
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_ => return None,
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})
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}
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}
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};
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}
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def_regs! {
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0b0000 : rax eax ax al ah=spl,
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0b0001 : rcx ecx cx cl ch=bpl,
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0b0010 : rdx edx dx dl dh=sil,
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0b0011 : rbx ebx bx bl bh=dil,
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0b0100 : rsp esp sp spl,
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0b0101 : rbp ebp bp bpl,
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0b0110 : rsi esi si sil,
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0b0111 : rdi edi di dil,
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0b1000 : r8 r8d r8w r8b,
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0b1001 : r9 r9d r9w r9b,
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0b1010 : r10 r10d r10w r10b,
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0b1011 : r11 r11d r11w r11b,
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0b1100 : r12 r12d r12w r12b,
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0b1101 : r13 r13d r13w r13b,
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0b1110 : r14 r14d r14w r14b,
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0b1111 : r15 r15d r15w r15b,
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}
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#[derive(Clone, Copy, PartialEq)]
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pub enum BitWidth {
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B64,
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B32,
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B16,
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B8,
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}
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impl BitWidth {
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pub const fn max(&self) -> u64 {
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match self {
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Self::B64 => u64::MAX,
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Self::B32 => u32::MAX as u64,
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Self::B16 => u16::MAX as u64,
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Self::B8 => u8::MAX as u64,
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}
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}
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pub const fn bytes(&self) -> usize {
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match self {
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Self::B64 => 8,
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Self::B32 => 4,
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Self::B16 => 2,
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Self::B8 => 1,
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}
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}
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}
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pub mod instr {
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use super::*;
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pub fn mov(dst: RegMode, src: impl Into<RegImm>) -> Instr {
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Instr::Mov {
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dst,
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src: src.into(),
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}
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}
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pub fn lea(dst: RegMode, sym: Symbol) -> Instr {
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Instr::Lea { dst, sym }
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}
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pub fn int(code: u8) -> Instr {
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Instr::Int { code }
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}
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}
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impl From<RegMode> for RegImm {
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fn from(value: RegMode) -> Self {
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Self::Reg(value)
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}
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}
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impl From<u64> for RegImm {
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fn from(value: u64) -> Self {
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Self::Imm(value)
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}
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}
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#[cfg(test)]
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mod test {
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use crate::backend::program::Instr as _;
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use super::*;
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use instr::*;
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use reg::*;
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fn eq(expected: impl AsRef<[u8]>, got: Instr) {
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let expected = expected.as_ref();
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let mut res = Vec::new();
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if let Err(e) = got.encode(&mut res, &mut SymTable::new(0)) {
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panic!("expected {expected:x?}, failed to compile: {}", e.msg);
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}
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assert_eq!(expected, &res[..], "expected {expected:x?}, got {res:x?}");
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}
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#[test]
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fn reg_reg() {
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// used objdump on some nasm compiled assembly
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eq([0x48, 0x89, 0xd8], mov(rax, rbx));
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eq([0x89, 0xd8], mov(eax, ebx));
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eq([0x66, 0x89, 0xd8], mov(ax, bx));
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eq([0x88, 0xd8], mov(al, bl));
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eq([0x88, 0xfc], mov(ah, bh));
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eq([0x88, 0xf8], mov(al, bh));
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eq([0x88, 0xdc], mov(ah, bl));
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eq([0x40, 0x88, 0xe7], mov(dil, spl));
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eq([0x4d, 0x89, 0xc8], mov(r8, r9));
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eq([0x45, 0x89, 0xc8], mov(r8d, r9d));
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eq([0x66, 0x45, 0x89, 0xc8], mov(r8w, r9w));
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eq([0x45, 0x88, 0xc8], mov(r8b, r9b));
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eq([0x49, 0x89, 0xc0], mov(r8, rax));
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eq([0x4c, 0x89, 0xc0], mov(rax, r8));
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eq([0x4d, 0x89, 0xd1], mov(r9, r10));
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eq([0x4d, 0x89, 0xe0], mov(r8, r12));
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}
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#[test]
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fn reg_imm() {
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eq(
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[0x49, 0xbf, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(r15, 0x123456789abcdef0),
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);
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eq(
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[0x49, 0xb8, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(r8, 0x123456789abcdef0),
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);
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eq(
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[0x49, 0xb9, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(r9, 0x123456789abcdef0),
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);
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eq([0x41, 0xb9, 0x78, 0x56, 0x34, 0x12], mov(r9d, 0x12345678));
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eq([0x66, 0x41, 0xb9, 0x34, 0x12], mov(r9w, 0x1234));
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eq([0x41, 0xb1, 0x12], mov(r9b, 0x12));
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eq([0x41, 0xb0, 0x12], mov(r8b, 0x12));
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eq([0x41, 0xb7, 0x12], mov(r15b, 0x12));
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eq(
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[0x48, 0xb8, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(rax, 0x123456789abcdef0),
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);
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eq(
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[0x48, 0xbb, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(rbx, 0x123456789abcdef0),
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);
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eq(
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[0x48, 0xbf, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
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mov(rdi, 0x123456789abcdef0),
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);
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eq([0xbb, 0x78, 0x56, 0x34, 0x12], mov(ebx, 0x12345678));
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eq([0x66, 0xbb, 0x34, 0x12], mov(bx, 0x1234));
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eq([0xb3, 0x12], mov(bl, 0x12));
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eq([0xb7, 0x12], mov(bh, 0x12));
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eq([0xb4, 0x12], mov(ah, 0x12));
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eq([0x40, 0xb7, 0x12], mov(dil, 0x12));
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}
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}
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