lots of refactoring
This commit is contained in:
+53
-30
@@ -1,5 +1,5 @@
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use crate::{
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use crate::{
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arch::x86_64::{BitWidth, Reg, RegMode},
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arch::x86_64::{Reg, RegH, RegWH, Width, WidthH},
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backend::Symbol,
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backend::Symbol,
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};
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};
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@@ -9,34 +9,42 @@ pub struct Asm {
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#[derive(Clone, Copy)]
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#[derive(Clone, Copy)]
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pub enum Instr {
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pub enum Instr {
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Mov { dst: RegMode, src: RegImmMem },
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Movr { dst: RegH, src: RegH, width: Width },
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Movi { dst: RegWH, imm: u64 },
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// TODO: horrible
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// TODO: horrible
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MemMov { reg: RegMode, offset: u64, val: u64 },
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Movm { reg: RegWH, offset: u32, val: u32 },
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Int(u8),
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Int(u8),
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Call(Symbol),
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Call(Symbol),
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CallMem(Symbol),
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Callm(Symbol),
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Ret,
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Ret,
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Syscall,
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Syscall,
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Lea { dst: RegMode, sym: Symbol },
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Lea { dst: RegWH, sym: Symbol },
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Push(RegImm),
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Pushr(Reg),
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Pushi(u32),
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Pop(Reg),
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Pop(Reg),
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Sub,
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Sub,
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}
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}
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#[derive(Clone, Copy)]
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pub struct Mem {
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reg: Reg,
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disp: u32,
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}
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#[derive(Clone, Copy)]
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#[derive(Clone, Copy)]
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pub enum RegImmMem {
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pub enum RegImmMem {
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Reg(RegMode),
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Reg(RegWH),
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Imm(u64),
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Imm(u64),
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}
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}
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#[derive(Clone, Copy)]
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#[derive(Clone, Copy)]
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pub enum RegImm {
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pub enum RegImm<const WIDTH: u8> {
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Reg(Reg),
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Reg(Reg),
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Imm(u64),
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Imm(u64),
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}
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}
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impl From<RegMode> for RegImmMem {
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impl From<RegWH> for RegImmMem {
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fn from(value: RegMode) -> Self {
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fn from(value: RegWH) -> Self {
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Self::Reg(value)
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Self::Reg(value)
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}
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}
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}
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}
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@@ -60,31 +68,46 @@ impl From<i32> for RegImmMem {
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}
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}
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mod fns {
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mod fns {
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use crate::io::CompilerMsg;
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use super::*;
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use super::*;
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pub fn mov(dst: RegMode, src: impl Into<RegImmMem>) -> Instr {
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pub fn mov(dst: RegWH, src: impl Into<RegImmMem>) -> Result<Instr, CompilerMsg> {
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Instr::Mov {
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Ok(match src.into() {
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dst,
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RegImmMem::Reg(src) => {
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src: src.into(),
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if src.widthh.width() != dst.widthh.width() {
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}
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return Err("src and dst are not same width".into());
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}
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}
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Instr::Movr {
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pub fn lea(dst: RegMode, sym: Symbol) -> Instr {
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dst: dst.into(),
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Instr::Lea { dst, sym }
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src: src.into(),
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}
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width: dst.widthh.into(),
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}
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pub fn push(reg: impl Into<RegImmMem>) -> Instr {
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Instr::Push(match reg.into() {
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RegImmMem::Reg(reg) => {
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assert_eq!(reg.width, BitWidth::B64);
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assert!(!reg.high);
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RegImm::Reg(reg.reg)
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}
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}
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RegImmMem::Imm(imm) => RegImm::Imm(imm),
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RegImmMem::Imm(imm) => Instr::Movi { dst, imm },
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})
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})
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}
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}
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pub fn pop(reg: RegMode) -> Instr {
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pub fn lea(dst: RegWH, sym: Symbol) -> Instr {
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assert!(reg.width == BitWidth::B64);
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Instr::Lea { dst, sym }
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}
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pub fn push(reg: impl Into<RegImmMem>) -> Result<Instr, CompilerMsg> {
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Ok(match reg.into() {
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RegImmMem::Reg(reg) => {
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if reg.widthh != WidthH::B64 {
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return Err("register must be 64 bit".into());
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}
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Instr::Pushr(reg.reg)
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}
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RegImmMem::Imm(imm) => match imm.try_into() {
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Ok(imm) => Instr::Pushi(imm),
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Err(_) => return Err("immediate must be 32 bit".into()),
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},
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})
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}
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pub fn pop(reg: RegWH) -> Instr {
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assert!(reg.widthh == WidthH::B64);
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Instr::Pop(reg.reg)
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Instr::Pop(reg.reg)
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}
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}
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}
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}
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+52
-64
@@ -2,6 +2,7 @@ use std::collections::HashMap;
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use super::*;
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use super::*;
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use crate::backend::{LibImport, LinkedProgram, SymImport, SymTable, Symbol};
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use crate::backend::{LibImport, LinkedProgram, SymImport, SymTable, Symbol};
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use util::*;
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pub struct Encoder<'a> {
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pub struct Encoder<'a> {
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pub data: Vec<u8>,
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pub data: Vec<u8>,
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@@ -71,63 +72,42 @@ fn compile_instr(encoder: &mut Encoder, instr: &BInstr) -> Result<(), CompilerMs
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impl Encoder<'_> {
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impl Encoder<'_> {
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// assembly
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// assembly
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pub fn mov(&mut self, dst: RegMode, src: impl Into<RegImmMem>) -> Result<(), CompilerMsg> {
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pub fn movi(&mut self, dst: RegWH, imm: u64) -> Result<(), CompilerMsg> {
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let src = src.into();
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if dst.widthh == WidthH::B16 {
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let width = dst.width;
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if width == BitWidth::B16 {
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self.data.push(0x66);
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self.data.push(0x66);
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}
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}
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let dst8 = dst.gt8();
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if dst.requires_rex() {
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let b64 = width == BitWidth::B64;
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self.data.push(rex(dst.widthh, 0, 0, dst));
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let b8 = width == BitWidth::B8;
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let src8 = if let RegImmMem::Reg(src) = src {
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src.gt8()
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} else {
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false
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};
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// special 64-bit / register 4-7 indicator
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if dst8 || src8 || b64 || (dst.gt4() && !dst.high) {
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self.data
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.push(0x40 | dst8 as u8 | ((b64 as u8) << 3) | ((src8 as u8) << 2));
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}
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}
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match src {
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if imm > dst.widthh.max() {
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RegImmMem::Reg(src) => {
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return Err("immediate cannot fit in register".into());
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if dst.width != src.width {
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return Err("src and dst are not the same size".into());
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}
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self.data.push(0x88 | !b8 as u8);
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let modrm = 0b11_000_000 | (src.base() << 3) | dst.base();
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self.data.push(modrm);
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}
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RegImmMem::Imm(imm) => {
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if imm > width.max() {
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return Err("immediate cannot fit in register".into());
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}
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self.data.push(0xb0 | ((!b8 as u8) << 3) | dst.base());
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self.data.extend(&imm.to_le_bytes()[..width.bytes()]);
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}
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}
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}
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let opcode = 0xb0 | ((dst.widthh.gt8() as u8) << 3);
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self.data.push(opcode | dst.base());
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self.data.extend(&imm.to_le_bytes()[..dst.widthh.bytes()]);
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Ok(())
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Ok(())
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}
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}
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pub fn mem_mov(&mut self, reg: RegMode, offset: u64, val: u64) {
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pub fn movr(&mut self, dst: RegH, src: RegH, width: Width) {
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assert!(offset <= u8::MAX as u64);
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if width == Width::B16 {
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assert!(val <= u32::MAX as u64);
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self.data.push(0x66);
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self.data
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.extend([0x48 | ((reg.gt8() as u8) << 2), 0xc7, 0x40 | reg.base()]);
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if reg.reg == rsp.reg {
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self.data.push(0x24)
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}
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}
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self.data.push(offset as u8);
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if src.requires_rex(width) || dst.requires_rex(width) {
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self.data.extend((val as u32).to_le_bytes());
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self.data.push(rex(width, src, 0, dst));
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}
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self.data.push(0x88 | width.gt8() as u8);
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self.data.push(modrm_regs(src, dst));
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}
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}
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pub fn lea(&mut self, dst: RegMode, sym: Symbol) {
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pub fn movm(&mut self, reg: RegWH, offset: u32, val: u32) {
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self.data.extend([
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self.data.extend([rex(1, reg, 0, 0), 0xc7]);
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0x48 | ((dst.gt8() as u8) << 2),
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self.modrm_regdisp(reg, offset);
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0x8d,
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self.data.extend(val.to_le_bytes());
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0x05 | (dst.base() << 3),
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}
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]);
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pub fn lea(&mut self, dst: RegWH, sym: Symbol) {
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self.data
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.extend([rex(1, dst, 0, 0), 0x8d, modrm_disp32(dst)]);
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self.sym_offset4(sym);
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self.sym_offset4(sym);
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}
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}
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@@ -144,7 +124,7 @@ impl Encoder<'_> {
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self.sym_offset4(sym);
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self.sym_offset4(sym);
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}
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}
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pub fn call_mem(&mut self, sym: Symbol) {
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pub fn callm(&mut self, sym: Symbol) {
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self.data.extend([0xff, 0x15]);
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self.data.extend([0xff, 0x15]);
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self.sym_offset4(sym);
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self.sym_offset4(sym);
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}
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}
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@@ -153,15 +133,15 @@ impl Encoder<'_> {
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self.data.push(0xc3);
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self.data.push(0xc3);
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}
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}
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pub fn push(&mut self, reg: Reg) {
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pub fn pushr(&mut self, reg: Reg) {
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if reg.gt8() {
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if reg.gt8() {
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self.data.push(0x41);
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self.data.push(0x41);
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}
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}
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self.data.push(0x50 | reg.base());
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self.data.push(0x50 | reg.base());
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}
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}
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pub fn push_imm(&mut self, imm: u64) {
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pub fn pushi(&mut self, imm: u32) {
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const U8: u64 = 2 << 8;
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const U8: u32 = 2 << 8;
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if let 0..U8 = imm {
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if let 0..U8 = imm {
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self.data.push(0x6a);
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self.data.push(0x6a);
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self.data.push(imm as u8);
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self.data.push(imm as u8);
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@@ -195,30 +175,38 @@ impl Encoder<'_> {
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|
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pub fn asm(&mut self, instr: Instr) -> Result<(), CompilerMsg> {
|
pub fn asm(&mut self, instr: Instr) -> Result<(), CompilerMsg> {
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match instr {
|
match instr {
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Instr::Mov { dst, src } => self.mov(dst, src)?,
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Instr::Movr { dst, src, width } => self.movr(dst, src, width),
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Instr::MemMov { reg, offset, val } => self.mem_mov(reg, offset, val),
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Instr::Movi { dst, imm } => self.movi(dst, imm)?,
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Instr::Movm { reg, offset, val } => self.movm(reg, offset, val),
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Instr::Int(code) => self.int(code),
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Instr::Int(code) => self.int(code),
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Instr::Syscall => self.syscall(),
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Instr::Syscall => self.syscall(),
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Instr::Lea { dst, sym } => self.lea(dst, sym),
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Instr::Lea { dst, sym } => self.lea(dst, sym),
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Instr::Call(sym) => self.call(sym),
|
Instr::Call(sym) => self.call(sym),
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|
Instr::Callm(sym) => self.callm(sym),
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Instr::Ret => self.ret(),
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Instr::Ret => self.ret(),
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Instr::Push(val) => match val {
|
Instr::Pushr(reg) => self.pushr(reg),
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RegImm::Reg(reg) => self.push(reg),
|
Instr::Pushi(imm) => self.pushi(imm),
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RegImm::Imm(imm) => self.push_imm(imm),
|
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},
|
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Instr::Pop(reg) => self.pop(reg),
|
Instr::Pop(reg) => self.pop(reg),
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Instr::CallMem(sym) => self.call_mem(sym),
|
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Instr::Sub => self.data.extend([0x48, 0x83, 0xec, 0x28]),
|
Instr::Sub => self.data.extend([0x48, 0x83, 0xec, 0x28]),
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}
|
}
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Ok(())
|
Ok(())
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}
|
}
|
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}
|
|
||||||
|
|
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/// assumes the next instruction is directly after
|
pub fn modrm_regdisp(&mut self, reg: impl Into<Reg>, disp: u32) {
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fn addr_offset(pos: usize, addr: u64) -> [u8; 4] {
|
let reg = reg.into();
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let pos = (pos + 4) as i32;
|
let disp8 = disp < u8::MAX as u32;
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let offset = addr as i32 - pos;
|
let mod_ = if disp8 { 0b01 } else { 0b10 };
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offset.to_le_bytes()
|
self.data.push(modrm(mod_, 0, reg.base()));
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|
if reg == rsp.reg {
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|
// SIB
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|
self.data.push(0x24);
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|
}
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|
if disp8 {
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|
self.data.push(disp as u8);
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|
} else {
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|
self.data.extend(disp.to_le_bytes());
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
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|
|
||||||
impl<'a> Encoder<'a> {
|
impl<'a> Encoder<'a> {
|
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|
|||||||
@@ -2,6 +2,7 @@ mod asm;
|
|||||||
mod encode;
|
mod encode;
|
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mod reg;
|
mod reg;
|
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mod test;
|
mod test;
|
||||||
|
mod util;
|
||||||
|
|
||||||
use crate::{
|
use crate::{
|
||||||
arch::Arch,
|
arch::Arch,
|
||||||
|
|||||||
+126
-38
@@ -2,47 +2,35 @@
|
|||||||
pub struct Reg(u8);
|
pub struct Reg(u8);
|
||||||
|
|
||||||
#[derive(Clone, Copy)]
|
#[derive(Clone, Copy)]
|
||||||
pub struct RegMode {
|
pub struct RegH {
|
||||||
pub reg: Reg,
|
pub reg: Reg,
|
||||||
pub width: BitWidth,
|
|
||||||
pub high: bool,
|
pub high: bool,
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[derive(Clone, Copy)]
|
||||||
|
pub struct RegWH {
|
||||||
|
pub reg: Reg,
|
||||||
|
pub widthh: WidthH,
|
||||||
|
}
|
||||||
|
|
||||||
#[derive(Debug, Clone, Copy, PartialEq)]
|
#[derive(Debug, Clone, Copy, PartialEq)]
|
||||||
pub enum BitWidth {
|
pub enum Width {
|
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B64,
|
B64,
|
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B32,
|
B32,
|
||||||
B16,
|
B16,
|
||||||
B8,
|
B8,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Reg {
|
/// width that also specifies if high for 8 bit
|
||||||
pub fn base(&self) -> u8 {
|
#[derive(Debug, Clone, Copy, PartialEq)]
|
||||||
self.0 & 0b111
|
pub enum WidthH {
|
||||||
}
|
B64,
|
||||||
/// checks if register is not one of the first 8 (0-7)
|
B32,
|
||||||
pub fn gt8(&self) -> bool {
|
B16,
|
||||||
self.0 >= 0b1000
|
B8 { high: bool },
|
||||||
}
|
|
||||||
pub fn gt4(&self) -> bool {
|
|
||||||
self.0 >= 0b0100
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
impl RegMode {
|
def_regs! { RegWH;
|
||||||
pub fn base(&self) -> u8 {
|
|
||||||
self.reg.base()
|
|
||||||
}
|
|
||||||
/// checks if register is not one of the first 8 (0-7)
|
|
||||||
pub fn gt8(&self) -> bool {
|
|
||||||
self.reg.gt8()
|
|
||||||
}
|
|
||||||
pub fn gt4(&self) -> bool {
|
|
||||||
self.reg.gt4()
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
def_regs! {
|
|
||||||
0b0000 : rax eax ax al ah=spl,
|
0b0000 : rax eax ax al ah=spl,
|
||||||
0b0001 : rcx ecx cx cl ch=bpl,
|
0b0001 : rcx ecx cx cl ch=bpl,
|
||||||
0b0010 : rdx edx dx dl dh=sil,
|
0b0010 : rdx edx dx dl dh=sil,
|
||||||
@@ -63,13 +51,40 @@ def_regs! {
|
|||||||
0b1111 : r15 r15d r15w r15b,
|
0b1111 : r15 r15d r15w r15b,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl BitWidth {
|
impl Reg {
|
||||||
|
pub fn base(&self) -> u8 {
|
||||||
|
self.0 & 0b111
|
||||||
|
}
|
||||||
|
/// checks if register is not one of the first 8 (0-7)
|
||||||
|
pub fn gt8(&self) -> bool {
|
||||||
|
self.0 >= 0b1000
|
||||||
|
}
|
||||||
|
pub fn gt4(&self) -> bool {
|
||||||
|
self.0 >= 0b0100
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RegWH {
|
||||||
|
pub fn requires_rex(&self) -> bool {
|
||||||
|
self.gt8()
|
||||||
|
|| self.widthh == WidthH::B64
|
||||||
|
|| (self.gt4() && self.widthh == WidthH::B8 { high: false })
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RegH {
|
||||||
|
pub fn requires_rex(&self, width: Width) -> bool {
|
||||||
|
self.gt8() || width == Width::B64 || (self.gt4() && width == Width::B8 && !self.high)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl WidthH {
|
||||||
pub const fn max(&self) -> u64 {
|
pub const fn max(&self) -> u64 {
|
||||||
match self {
|
match self {
|
||||||
Self::B64 => u64::MAX,
|
Self::B64 => u64::MAX,
|
||||||
Self::B32 => u32::MAX as u64,
|
Self::B32 => u32::MAX as u64,
|
||||||
Self::B16 => u16::MAX as u64,
|
Self::B16 => u16::MAX as u64,
|
||||||
Self::B8 => u8::MAX as u64,
|
Self::B8 { .. } => u8::MAX as u64,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
pub const fn bytes(&self) -> usize {
|
pub const fn bytes(&self) -> usize {
|
||||||
@@ -77,28 +92,84 @@ impl BitWidth {
|
|||||||
Self::B64 => 8,
|
Self::B64 => 8,
|
||||||
Self::B32 => 4,
|
Self::B32 => 4,
|
||||||
Self::B16 => 2,
|
Self::B16 => 2,
|
||||||
Self::B8 => 1,
|
Self::B8 { .. } => 1,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/// greater than 8 bits
|
||||||
|
pub const fn gt8(&self) -> bool {
|
||||||
|
!matches!(self, Self::B8 { .. })
|
||||||
|
}
|
||||||
|
|
||||||
|
pub const fn width(&self) -> Width {
|
||||||
|
match self {
|
||||||
|
WidthH::B64 => Width::B64,
|
||||||
|
WidthH::B32 => Width::B32,
|
||||||
|
WidthH::B16 => Width::B16,
|
||||||
|
WidthH::B8 { .. } => Width::B8,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl Width {
|
||||||
|
/// greater than 8 bits
|
||||||
|
pub const fn gt8(&self) -> bool {
|
||||||
|
!matches!(self, Self::B8)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl From<RegWH> for Reg {
|
||||||
|
fn from(value: RegWH) -> Self {
|
||||||
|
value.reg
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl From<RegH> for Reg {
|
||||||
|
fn from(value: RegH) -> Self {
|
||||||
|
value.reg
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl From<RegWH> for RegH {
|
||||||
|
fn from(value: RegWH) -> Self {
|
||||||
|
Self {
|
||||||
|
reg: value.reg,
|
||||||
|
high: if let WidthH::B8 { high } = value.widthh {
|
||||||
|
high
|
||||||
|
} else {
|
||||||
|
false
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl From<WidthH> for Width {
|
||||||
|
fn from(value: WidthH) -> Self {
|
||||||
|
match value {
|
||||||
|
WidthH::B64 => Self::B64,
|
||||||
|
WidthH::B32 => Self::B32,
|
||||||
|
WidthH::B16 => Self::B16,
|
||||||
|
WidthH::B8 { .. } => Self::B8,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
macro_rules! def_regs {
|
macro_rules! def_regs {
|
||||||
($($val:literal : $B64:ident $B32:ident $B16:ident $B8:ident $($B8H:ident=$hval:expr)?,)*) => {
|
($Struct: ident; $($val:literal : $B64:ident $B32:ident $B16:ident $B8:ident $($B8H:ident=$hval:expr)?,)*) => {
|
||||||
$(
|
$(
|
||||||
#[allow(non_upper_case_globals)]
|
#[allow(non_upper_case_globals)]
|
||||||
pub const $B64: RegMode = RegMode { reg: Reg($val), width: BitWidth::B64, high: false };
|
pub const $B64: $Struct = $Struct { reg: Reg($val), widthh: WidthH::B64 };
|
||||||
#[allow(non_upper_case_globals)]
|
#[allow(non_upper_case_globals)]
|
||||||
pub const $B32: RegMode = RegMode { reg: Reg($val), width: BitWidth::B32, high: false };
|
pub const $B32: $Struct = $Struct { reg: Reg($val), widthh: WidthH::B32 };
|
||||||
#[allow(non_upper_case_globals)]
|
#[allow(non_upper_case_globals)]
|
||||||
pub const $B16: RegMode = RegMode { reg: Reg($val), width: BitWidth::B16, high: false };
|
pub const $B16: $Struct = $Struct { reg: Reg($val), widthh: WidthH::B16 };
|
||||||
#[allow(non_upper_case_globals)]
|
#[allow(non_upper_case_globals)]
|
||||||
pub const $B8 : RegMode = RegMode { reg: Reg($val), width: BitWidth::B8, high: false };
|
pub const $B8 : $Struct = $Struct { reg: Reg($val), widthh: WidthH::B8 { high: false } };
|
||||||
$(
|
$(
|
||||||
#[allow(non_upper_case_globals)]
|
#[allow(non_upper_case_globals)]
|
||||||
pub const $B8H: RegMode = RegMode { reg: $hval.reg, width: BitWidth::B8, high: true };
|
pub const $B8H: $Struct = $Struct { reg: $hval.reg, widthh: WidthH::B8 { high: true } };
|
||||||
)?
|
)?
|
||||||
)*
|
)*
|
||||||
impl RegMode {
|
impl $Struct {
|
||||||
pub fn parse(s: &str) -> Option<Self> {
|
pub fn parse(s: &str) -> Option<Self> {
|
||||||
Some(match s.to_lowercase().as_str() {
|
Some(match s.to_lowercase().as_str() {
|
||||||
$(
|
$(
|
||||||
@@ -116,4 +187,21 @@ macro_rules! def_regs {
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
use def_regs;
|
use def_regs;
|
||||||
|
|
||||||
|
impl std::ops::Deref for RegWH {
|
||||||
|
type Target = Reg;
|
||||||
|
|
||||||
|
fn deref(&self) -> &Self::Target {
|
||||||
|
&self.reg
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl std::ops::Deref for RegH {
|
||||||
|
type Target = Reg;
|
||||||
|
|
||||||
|
fn deref(&self) -> &Self::Target {
|
||||||
|
&self.reg
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|||||||
+24
-21
@@ -5,11 +5,12 @@ use crate::{
|
|||||||
use std::{fs::OpenOptions, io::Write, os::unix::fs::OpenOptionsExt, process::Command};
|
use std::{fs::OpenOptions, io::Write, os::unix::fs::OpenOptionsExt, process::Command};
|
||||||
|
|
||||||
pub fn run() {
|
pub fn run() {
|
||||||
windows();
|
if let Err(err) = linux() {
|
||||||
// linux();
|
println!("{err:?}");
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn linux() {
|
fn linux() -> Result<(), CompilerMsg> {
|
||||||
let mut program = Program::<X86_64>::default();
|
let mut program = Program::<X86_64>::default();
|
||||||
let text = b"Hello world!\n";
|
let text = b"Hello world!\n";
|
||||||
let text_sym = program.ro_data("hello_en", text);
|
let text_sym = program.ro_data("hello_en", text);
|
||||||
@@ -19,10 +20,10 @@ fn linux() {
|
|||||||
"hello2",
|
"hello2",
|
||||||
[BInstr::Asm(Asm {
|
[BInstr::Asm(Asm {
|
||||||
instrs: vec![
|
instrs: vec![
|
||||||
mov(ax, 1),
|
mov(ax, 1)?,
|
||||||
mov(di, 1),
|
mov(di, 1)?,
|
||||||
lea(rsi, text_sym2),
|
lea(rsi, text_sym2),
|
||||||
mov(dx, text2.len() as u64),
|
mov(dx, text2.len() as u64)?,
|
||||||
Instr::Syscall,
|
Instr::Syscall,
|
||||||
Instr::Ret,
|
Instr::Ret,
|
||||||
],
|
],
|
||||||
@@ -32,15 +33,15 @@ fn linux() {
|
|||||||
"main",
|
"main",
|
||||||
[BInstr::Asm(Asm {
|
[BInstr::Asm(Asm {
|
||||||
instrs: vec![
|
instrs: vec![
|
||||||
mov(di, 39),
|
mov(di, 39)?,
|
||||||
push(rdi),
|
push(rdi)?,
|
||||||
mov(ax, 1),
|
mov(ax, 1)?,
|
||||||
mov(di, 1),
|
mov(di, 1)?,
|
||||||
lea(rsi, text_sym),
|
lea(rsi, text_sym),
|
||||||
mov(dx, text.len() as u64),
|
mov(dx, text.len() as u64)?,
|
||||||
Instr::Syscall,
|
Instr::Syscall,
|
||||||
Instr::Call(hello2),
|
Instr::Call(hello2),
|
||||||
mov(ax, 0x3c),
|
mov(ax, 0x3c)?,
|
||||||
pop(rdi),
|
pop(rdi),
|
||||||
Instr::Syscall,
|
Instr::Syscall,
|
||||||
],
|
],
|
||||||
@@ -73,9 +74,10 @@ fn linux() {
|
|||||||
if let Some(code) = status.code() {
|
if let Some(code) = status.code() {
|
||||||
std::process::exit(code);
|
std::process::exit(code);
|
||||||
}
|
}
|
||||||
|
Ok(())
|
||||||
}
|
}
|
||||||
|
|
||||||
fn windows() {
|
fn windows() -> Result<(), CompilerMsg> {
|
||||||
let mut program = Program::<X86_64>::default();
|
let mut program = Program::<X86_64>::default();
|
||||||
let [get_std_handle, write_file, exit_process] =
|
let [get_std_handle, write_file, exit_process] =
|
||||||
program.external("KERNEL32.dll", ["GetStdHandle", "WriteFile", "ExitProcess"]);
|
program.external("KERNEL32.dll", ["GetStdHandle", "WriteFile", "ExitProcess"]);
|
||||||
@@ -88,22 +90,22 @@ fn windows() {
|
|||||||
instrs: vec![
|
instrs: vec![
|
||||||
Instr::Sub,
|
Instr::Sub,
|
||||||
// stdout
|
// stdout
|
||||||
mov(ecx, -11),
|
mov(ecx, -11)?,
|
||||||
Instr::CallMem(get_std_handle),
|
Instr::Callm(get_std_handle),
|
||||||
// write
|
// write
|
||||||
mov(rcx, rax),
|
mov(rcx, rax)?,
|
||||||
lea(rdx, text_sym),
|
lea(rdx, text_sym),
|
||||||
mov(r8d, text.len() as u64),
|
mov(r8d, text.len() as u64)?,
|
||||||
lea(r9, written),
|
lea(r9, written),
|
||||||
Instr::MemMov {
|
Instr::Movm {
|
||||||
reg: rsp,
|
reg: rsp,
|
||||||
offset: 0x20,
|
offset: 0x20,
|
||||||
val: 0,
|
val: 0,
|
||||||
},
|
},
|
||||||
Instr::CallMem(write_file),
|
Instr::Callm(write_file),
|
||||||
// exit
|
// exit
|
||||||
mov(ecx, 39),
|
mov(ecx, 39)?,
|
||||||
Instr::CallMem(exit_process),
|
Instr::Callm(exit_process),
|
||||||
],
|
],
|
||||||
})],
|
})],
|
||||||
);
|
);
|
||||||
@@ -121,6 +123,7 @@ fn windows() {
|
|||||||
if let Some(code) = status.code() {
|
if let Some(code) = status.code() {
|
||||||
std::process::exit(code);
|
std::process::exit(code);
|
||||||
}
|
}
|
||||||
|
Ok(())
|
||||||
}
|
}
|
||||||
|
|
||||||
fn write(path: &str, binary: &[u8]) {
|
fn write(path: &str, binary: &[u8]) {
|
||||||
|
|||||||
@@ -1,9 +1,15 @@
|
|||||||
use super::*;
|
use super::*;
|
||||||
|
|
||||||
fn eq(expected: impl AsRef<[u8]>, asm: Instr) {
|
fn eq(expected: impl AsRef<[u8]>, asm: Result<Instr, CompilerMsg>) {
|
||||||
let expected = expected.as_ref();
|
let expected = expected.as_ref();
|
||||||
let program = Program::default();
|
let program = Program::default();
|
||||||
let mut encoder = Encoder::new(&program);
|
let mut encoder = Encoder::new(&program);
|
||||||
|
let asm = match asm {
|
||||||
|
Ok(v) => v,
|
||||||
|
Err(e) => {
|
||||||
|
panic!("expected {expected:x?}, failed to compile: {}", e.msg);
|
||||||
|
}
|
||||||
|
};
|
||||||
if let Err(e) = encoder.asm(asm) {
|
if let Err(e) = encoder.asm(asm) {
|
||||||
panic!("expected {expected:x?}, failed to compile: {}", e.msg);
|
panic!("expected {expected:x?}, failed to compile: {}", e.msg);
|
||||||
}
|
}
|
||||||
@@ -12,7 +18,7 @@ fn eq(expected: impl AsRef<[u8]>, asm: Instr) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn reg_reg() {
|
fn mov_reg_reg() {
|
||||||
// used objdump on some nasm compiled assembly
|
// used objdump on some nasm compiled assembly
|
||||||
eq([0x48, 0x89, 0xd8], mov(rax, rbx));
|
eq([0x48, 0x89, 0xd8], mov(rax, rbx));
|
||||||
eq([0x89, 0xd8], mov(eax, ebx));
|
eq([0x89, 0xd8], mov(eax, ebx));
|
||||||
@@ -34,10 +40,13 @@ fn reg_reg() {
|
|||||||
eq([0x4d, 0x89, 0xd1], mov(r9, r10));
|
eq([0x4d, 0x89, 0xd1], mov(r9, r10));
|
||||||
|
|
||||||
eq([0x4d, 0x89, 0xe0], mov(r8, r12));
|
eq([0x4d, 0x89, 0xe0], mov(r8, r12));
|
||||||
|
|
||||||
|
eq([0x89, 0xe0], mov(eax, esp));
|
||||||
|
eq([0x89, 0xc4], mov(esp, eax));
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn reg_imm() {
|
fn mov_reg_imm() {
|
||||||
eq(
|
eq(
|
||||||
[0x49, 0xbf, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
|
[0x49, 0xbf, 0xf0, 0xde, 0xbc, 0x9a, 0x78, 0x56, 0x34, 0x12],
|
||||||
mov(r15, 0x123456789abcdef0u64),
|
mov(r15, 0x123456789abcdef0u64),
|
||||||
|
|||||||
@@ -0,0 +1,73 @@
|
|||||||
|
use super::*;
|
||||||
|
|
||||||
|
pub trait RexBit {
|
||||||
|
fn val(self) -> bool;
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for u8 {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self != 0
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for bool {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for RegH {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self.gt8()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for RegWH {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self.gt8()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for WidthH {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self == WidthH::B64
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl RexBit for Width {
|
||||||
|
fn val(self) -> bool {
|
||||||
|
self == Width::B64
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn modrm_regs(reg: impl Into<Reg>, reg_rm: impl Into<Reg>) -> u8 {
|
||||||
|
modrm(0b11, reg.into().base(), reg_rm.into().base())
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn modrm_disp32(reg: impl Into<Reg>) -> u8 {
|
||||||
|
modrm(0b00, reg.into().base(), 0b101)
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn modrm(mod_: u8, reg: u8, rm: u8) -> u8 {
|
||||||
|
(mod_ << 6) | (reg << 3) | rm
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn rex(w: impl RexBit, r: impl RexBit, x: impl RexBit, b: impl RexBit) -> u8 {
|
||||||
|
0b0100_0000 | bit(w, 3) | bit(r, 2) | bit(x, 1) | bit(b, 0)
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn bit(val: impl RexBit, pos: u8) -> u8 {
|
||||||
|
(val.val() as u8) << pos
|
||||||
|
}
|
||||||
|
|
||||||
|
/// assumes the next instruction is directly after
|
||||||
|
pub fn addr_offset(pos: usize, addr: u64) -> [u8; 4] {
|
||||||
|
let pos = (pos + 4) as i32;
|
||||||
|
let offset = addr as i32 - pos;
|
||||||
|
offset.to_le_bytes()
|
||||||
|
}
|
||||||
@@ -17,7 +17,7 @@ impl Node for Asm {
|
|||||||
let dst = parse_reg(ctx)?;
|
let dst = parse_reg(ctx)?;
|
||||||
ctx.expect(Token::Comma)?;
|
ctx.expect(Token::Comma)?;
|
||||||
let src = parse_rmi(ctx)?;
|
let src = parse_rmi(ctx)?;
|
||||||
instrs.push(Instr::Mov { dst, src });
|
instrs.push(mov(dst, src)?);
|
||||||
}
|
}
|
||||||
"int" => {
|
"int" => {
|
||||||
ctx.next();
|
ctx.next();
|
||||||
@@ -60,17 +60,17 @@ pub fn parse_rmi(ctx: &mut crate::parser::ParseCtx) -> Result<RegImmMem, Compile
|
|||||||
let next = ctx.expect_next()?;
|
let next = ctx.expect_next()?;
|
||||||
let err = || CompilerMsg::unexpected_token(&next, ctx.span, "a register or immediate");
|
let err = || CompilerMsg::unexpected_token(&next, ctx.span, "a register or immediate");
|
||||||
Ok(match &next {
|
Ok(match &next {
|
||||||
Token::Ident(ident) => RegImmMem::Reg(RegMode::parse(ident).ok_or_else(err)?),
|
Token::Ident(ident) => RegImmMem::Reg(RegWH::parse(ident).ok_or_else(err)?),
|
||||||
Token::Lit(LitTy::Number(num)) => RegImmMem::Imm(parse_imm(num, ctx.span)?),
|
Token::Lit(LitTy::Number(num)) => RegImmMem::Imm(parse_imm(num, ctx.span)?),
|
||||||
_ => return Err(err()),
|
_ => return Err(err()),
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn parse_reg(ctx: &mut crate::parser::ParseCtx) -> Result<RegMode, CompilerMsg> {
|
pub fn parse_reg(ctx: &mut crate::parser::ParseCtx) -> Result<RegWH, CompilerMsg> {
|
||||||
let next = ctx.expect_next()?;
|
let next = ctx.expect_next()?;
|
||||||
let err = || CompilerMsg::unexpected_token(&next, ctx.span, "a register");
|
let err = || CompilerMsg::unexpected_token(&next, ctx.span, "a register");
|
||||||
let Token::Ident(next) = &next else {
|
let Token::Ident(next) = &next else {
|
||||||
return Err(err());
|
return Err(err());
|
||||||
};
|
};
|
||||||
RegMode::parse(next).ok_or_else(err)
|
RegWH::parse(next).ok_or_else(err)
|
||||||
}
|
}
|
||||||
|
|||||||
BIN
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Reference in New Issue
Block a user