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modrm

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This commit is contained in:
iris
2026-06-16 21:03:30 -04:00
parent 4e06e474ea
commit d66f8f02b7
2 changed files with 99 additions and 33 deletions
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src/arch/x86_64/encode.rs
+24 -24
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@@ -27,7 +27,7 @@ impl Code {
self.prefix16(width);
self.rex(width, src, 0, dst);
self.bytes.push(0x88 | width.not8());
self.bytes.push(modrm_regs(src, dst));
self.modrm(src, dst);
}
RegImmMem::Imm(src) => {
let src_width = src.width_unsigned()?;
@@ -60,7 +60,7 @@ impl Code {
self.prefix16(dst);
self.rex(dst, dst, 0, src);
self.bytes.push(0x8a | dst.not8());
self.modrm_regdisp(dst, src);
self.modrm(dst, src);
}
},
RegMem::Mem(dst) => match src {
@@ -73,9 +73,9 @@ impl Code {
}
self.prefix32(&dst)?;
self.prefix16(src);
self.rex(src, src, 0, dst);
self.rex(dst, src, 0, dst);
self.bytes.push(0x88 | src.not8());
self.modrm_regdisp(src, dst);
self.modrm(src, dst);
}
RegImmMem::Imm(src) => {
let encode_width = dst.width.min(Width::B32);
@@ -94,7 +94,7 @@ impl Code {
self.prefix16(encode_width);
self.rex(dst, 0, 0, dst);
self.bytes.push(0xc6 | encode_width.not8());
self.modrm_regdisp(None, dst);
self.modrm(0, dst);
self.imm(src, encode_width);
}
RegImmMem::Mem(_) => return Err("cannot move memory to memory".into()),
@@ -145,9 +145,9 @@ impl Code {
}
pub fn lea(&mut self, dst: Reg, sym: Symbol) {
self.bytes
.extend([rex(1, dst, 0, 0), 0x8d, modrm_disp32(dst)]);
self.sym_offset4(sym);
self.rex(1, dst, 0, 0);
self.bytes.push(0x8d);
self.modrm(dst, sym);
}
pub fn int(&mut self, code: u8) {
@@ -198,7 +198,7 @@ impl Code {
width = dst_width;
}
self.bytes.push(modrm(0b11, ext, dst.base()));
self.modrm(ext, dst);
self.imm(src, width);
Ok(())
}
@@ -232,25 +232,25 @@ impl Code {
}
}
fn modrm_regdisp(&mut self, reg: impl Into<Option<Reg>>, mem: Mem) {
const I8_MIN: i32 = i8::MIN as i32;
const I8_MAX: i32 = i8::MAX as i32;
let mod_ = match mem.disp {
0 => 0b00,
I8_MIN..=I8_MAX => 0b01,
_ => 0b10,
fn modrm(&mut self, reg: impl ModRMReg, rm: impl ModRMRM) {
let addr = rm.addr();
let mod_ = match addr {
EffAddr::Mem0 | EffAddr::Sym(_) => 0b00,
EffAddr::Mem8(_) => 0b01,
EffAddr::Mem32(_) => 0b10,
EffAddr::None => 0b11,
};
let r = reg.into().map(|r| Reg::base(&r)).unwrap_or(0);
self.bytes.push(modrm(mod_, r, mem.reg.base()));
if mem.reg.base() == rsp.base() {
self.bytes
.push(((mod_ as u8) << 6) | (reg.val() << 3) | rm.rm());
if !matches!(addr, EffAddr::None) && rm.rm() == 0b100 {
// SIB
self.bytes.push(0x24);
}
match mod_ {
0b00 => (),
0b01 => self.bytes.push(mem.disp as u8),
0b10 => self.bytes.extend(mem.disp.to_le_bytes()),
_ => unreachable!(),
match addr {
EffAddr::Mem8(disp) => self.bytes.push(disp as u8),
EffAddr::Mem32(disp) => self.bytes.extend(disp.to_le_bytes()),
EffAddr::Sym(sym) => self.sym_offset4(sym),
_ => (),
}
}