diff --git a/src/arch/x86_64/encode.rs b/src/arch/x86_64/encode.rs
index 2bcdea5..6be3558 100644
--- a/src/arch/x86_64/encode.rs
+++ b/src/arch/x86_64/encode.rs
@@ -38,6 +38,7 @@ impl Code {
                     }
                     self.prefix16(dst);
                     if dst.width() == Width::B64 && src_width <= Width::B32 && src.0 < 0 {
+                        // use different op that sign extends for less bytes
                         self.bytes
                             .extend([rex(dst.width(), 0, 0, dst), 0xc7, 0xc0 | dst.base()]);
                         self.imm(src, Width::B32);